Recording and reproduction of mixed moving and still images

ABSTRACT

Image data is reproduced from a recording medium where moving-image data and still-image data are recorded, and the reproduced image data is stored in a memory. The memory can store still-image data for a plurality of different picture frames, and selectively reads the still-image data for the plurality of picture frames stored in the memory.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] This invention relates to an apparatus for reproducing imagedata, and more particularly, to an operation of reproducing a stillimage from a recording medium in which moving images and still imagesare recorded.

[0003] 2. Description of the Related Art

[0004] Digital VCR's (video cassette recorders) for recording video dataand audio data on a magnetic tape in the form of digital data andreproducing these data from the magnetic tape, have been known asapparatuses of these kinds.

[0005] Since such digital VCR's can record and reproduce images havinghigher quality than the image quality obtained by conventional analogVCR's, it is intended to provide a digital VCR with a function ofrecording and reproducing still images in addition to the ordinaryfunction of recording and reproducing moving images.

[0006] That is, when recording image data as data representing a stillimage, recording of a still image can be performed by recording the samephotographed image data (one frame) repeatedly for a period of aplurality of frames.

[0007] When recording moving images and still images mixed together inthe above-described manner, discrete portions (frames) of still-imagedata are present between bodies of moving-image data.

[0008] When it is intended to reproduce only still images recordedbetween moving images, it is necessary to perform an operation ofretrieving only still-image data by skipping recorded moving-image data.Accordingly, when the user instructs to reproduce the next still imageafter reproducing a given still image, the user is kept waiting whilethe next still image is retrieved. Hence, optimum operability is notrealized when reproducing a still image.

SUMMARY OF THE INVENTION

[0009] It is an object of the present invention to solve theabove-described problems.

[0010] It is another object of the present invention to improveoperability when reproducing a still image.

[0011] It is still another object of the present invention to providethe capability of effectively utilizing a memory.

[0012] According to one aspect, the present invention which achievesthese objectives relates to a reproducing apparatus including areproducing unit for reproducing image data from a recording mediumwhere moving-image data and still-image data are recorded, a storageunit for storing still-image data for a plurality of different pictureframes reproduced by the reproducing unit, and a memory control unit forselectively reading the still-image data for the plurality of pictureframes stored in the storage unit.

[0013] According to another aspect, the present invention which achievesthese objectives relates to a reproducing apparatus including areproducing unit for reproducing image data of a first format from arecording medium, a first storage unit for storing the image data of thefirst format reproduced by the reproducing unit, a processing unit forobtaining image data of a second format by performing processing for theimage data of the first format stored in the first storage unit, asecond storage unit, and a mode setting unit for setting a mode of theapparatus from among a plurality of modes. The plurality of modesinclude an ordinary mode in which the first storage unit stores theimage data of the first format reproduced by the reproducing unit, andthe second storage unit stores the image data of the second formatobtained by the processing unit, and a special mode in which the firststorage unit and the second storage unit store the image data of thefirst format reproduced by the reproducing unit.

[0014] According to still another aspect, the present invention whichachieves these objectives relates to a reproducing apparatus including areproducing unit for reproducing image data from a recording mediumwhere moving-image data and still-image data are recorded, a storageunit for storing the image data reproduced by the reproducing unit, anda mode setting unit for setting a mode of the apparatus from among aplurality of modes. The plurality of modes include a moving-imagereproducing mode in which the reproducing unit reproduces themoving-image data and the storage unit stores the moving-image data forn picture frames (n being an integer equal to or greater than 2), and astill-image reproducing mode in which the reproducing unit reproducesthe still-image data, and the storage unit stores the still-image datafor m (m>n) picture frames.

[0015] According to still another aspect, the present invention whichachieves these objectives relates to a data processing apparatusincluding a storage unit for storing first image data of a first formatand second image data of a second format different from the firstformat, and a control unit for changing a storage area for the firstimage data in the storage unit in accordance with a mode of theapparatus.

[0016] According to still another aspect, the present invention whichachieves these objectives relates to a reproducing apparatus including areproducing unit for reproducing encoded image data from a storagemedium where moving-image data and still-image data are recorded, astorage unit for storing the encoded image data reproduced by thereproducing unit, and a decoding unit for decoding the encoded imagedata stored in the storage unit. The storage unit also stores thedecoded image data. The apparatus also includes a control unit forchanging a storage area for the encoded image data in the storage unitin accordance with a mode of the apparatus.

[0017] According to still another aspect, the present invention whichachieves these objectives relates to an apparatus for reproducingencoded image data from a recording medium where still-image data for aplurality of different picture frames are recorded together withmoving-image data, and for storing the reproduced encoded image data ina memory. The apparatus has a still-image reproducing mode ofautomatically detecting and reproducing the still-image data for theplurality of picture frames recorded on the recording medium bycontrolling an operation of feeding the recording medium, and storingthe reproduced still-image data for the plurality of picture frames inthe memory.

[0018] The foregoing and other objects, advantages and features of thepresent invention will become more apparent from the following detaileddescription of the preferred embodiment taken in conjunction with theaccompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019]FIG. 1 is a block diagram illustrating the configuration of adigital VCR according to an embodiment of the present invention;

[0020]FIG. 2 is a diagram illustrating a memory space in the apparatusshown in FIG. 1;

[0021]FIG. 3 is a diagram illustrating a storage format of a memory inthe apparatus shown in FIG. 1;

[0022]FIG. 4 is a diagram illustrating data dealt with in the apparatusshown in FIG. 1;

[0023]FIG. 5 is a diagram illustrating the configuration of data shownin FIG. 4;

[0024]FIG. 6 is a diagram illustrating memory access timings whenreproducing moving images in the apparatus shown in FIG. 1;

[0025]FIG. 7 is a diagram illustrating recorded data on a tape in theembodiment;

[0026]FIG. 8 is a diagram illustrating memory access timings whenreproducing still images in the apparatus shown in FIG. 1;

[0027]FIG. 9 is a flowchart illustrating an operation of the apparatusshown in FIG. 1;

[0028]FIG. 10 is a diagram illustrating another example of memory accessin a still-image reproducing mode in the apparatus shown in FIG. 1;

[0029]FIG. 11 is a diagram illustrating the configuration of addressesin the memory when reproducing moving images in the apparatus shown inFIG. 1; and

[0030]FIG. 12 is a diagram illustrating the configuration of addressesin the memory when reproducing still images in the apparatus shown inFIG. 1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

[0031] A description will now be provided of a preferred embodiment ofthe present invention with reference to the drawings.

[0032]FIG. 1 is a block diagram illustrating the configuration of adigital VCR according to the embodiment.

[0033] In the apparatus shown in FIG. 1, each of several processingcircuits accesses a memory at a desired timing, under the control of aCPU (central processing unit), and the operation of the circuit isguaranteed by adjustment of an access request of the circuit by a memorycontrol circuit. Each processing circuit shown in FIG. 1 can process avideo signal in real time. Such processing circuits are arranged inparallel, and image data is supplied to the respective processingcircuits according to time sharing.

[0034] The configuration shown in FIG. 1 will now be described.

[0035] In FIG. 1, a data input/output circuit (hereinafter termed a“data I/O”) 1 performs input of image data from a video camera 39 andinput/output of data with an input/output terminal 41 and an electronicview finder 43 (hereinfater termed an “EVF”). An image-data input/outputcircuit (hereinafter termed an “image-data I/O”) 3 performs variouskinds of processing, such as Y/C separation processing and the like, oninput data input from the camera, output data sent to the EVF, and lineinput data received from the terminal. An audio processing circuit 5performs processing of audio data. An encoding/decoding circuit 7performs compression/expansion of the amount of information of imagedata by performing encoding/decoding processing using well-known DCT(discrete cosine transform) and variable-length encoding on the imagedata.

[0036] An error correction circuit (ECC) 9 performs error correctingencoding and decoding. An encoded-data input/output circuit (hereinaftertermed an “encoded-data I/O”) 11 converts the format when recordingencoded data and reproducing recorded data. An address conversioncircuit 13 converts a request for access to a memory 17 by any of theprocessing circuits into an actual address in the memory. A memoryinterface (hereinafter termed a “memory I/F”) 15 outputs a command tothe memory 17 in accordance with an access request from the addressconversion circuit 13. The memory 17, which comprises an SDRAM(synchronous dynamic random access memory) or the like, can performhigh-speed input/output. A system control CPU 19 controls all of theprocessing circuits. An interface (I/F) 21 exchanges commands between aservo CPU 23 and CPU 19. The servo CPU 23 controls the feeding speed ofa tape 35 and the operation of a rotating drum (not shown). A recordingprocessing circuit 25 performs electromagnetic conversion processing ofencoded data from the encoded-data I/O 11 and data reproduced from thetape 35, and has a magnetic head for performing recording/reproducingprocessing of data by tracing the tape 35.

[0037] An oscillator 27 (“CX”) supplies a clock signal as a timingsignal for each circuit. A frequency multiplication circuit 29 convertsthe frequency of the clock signal output from the oscillator 27 into afrequency appropriate for each circuit, and supplies the circuit withthe resultant clock signal. A reference-clock-signal oscillator 31(CLK”) generates a reference clock signal used when the image-data I/O 3inputs/outputs image data. A mechanism 33 includes a capstan, a capstanmotor, a drum motor and the like. An operation switch unit 37 comprisesvarious kinds of switches for reproducing, recording, fast feeding,instruction to record/reproduce a still image, and the like.

[0038] The servo CPU 23 exchanges data with the respective circuits viaa bus CBS1. The control CPU 19 exchanges data with the respectivecircuits via a bus CBS2.

[0039] In the apparatus having the configuration shown in FIG. 1, theimage-data I/O 3, the audio processing circuit 5, the encoding/decodingcircuit 7, the error correction circuit 9 and the encoded-data I/O 11are controlled by commands supplied from CPU 19 via the CBS2, andcommands supplied from the servo CPU 23 via the CBS1, the interface 21and the CBS2, and the respective circuits perform processing accordingto time sharing. The image-data I/O 3, the audio processing circuit 5,the encoding/decoding circuit 7, the ECC 9, the encoded-data I/O 11, theaddress conversion circuit 13, the memory I/F 15, the system control CPU19, the I/F 21 and the frequency multiplication circuit 29 areconfigured in the form of a single I/C chip 100.

[0040] As described above, an SDRAM for performing burst transfer ofdata in synchronization with the rise of a clock pulse is used as thememory 17, to which a clock signal having a frequency obtained bymultiplying the frequency of the clock signal supplied from theoscillator 27 is supplied.

[0041] The memory space of the memory 17 comprises a plurality of banks,and is configured by a memory region having a capacity capable ofstoring uncompressed image data for one frame per bank (a video memory,hereinafter termed a “VM”), and a memory region having a capacitycapable of storing encoded data for one frame per bank (a track memory,hereinafter termed a “TM”). Each memory region can be set to a writingmode and a reading mode for each frame. Each of the processing circuitsexchanges data with the VM or the TM in accordance with the form of datato be dealt with.

[0042] In the apparatus shown in FIG. 1, image data is processed inunits of a frame, and the memory 17 has capacities of two banks andthree banks for the VM and for the TM, respectively.

[0043] Next, the address space of the memory 17 to be accessed by eachof the processing circuits will be described with reference to FIG. 2.

[0044] As shown in FIG. 2, while the image-data I/O 3 principallyexchanges data with the VM, the encoding/decoding circuit 7 exchangesdata with the VM or the TM. Namely, in encoding processing, data is readfrom the VM and is encoded, and is then written in the TM. On the otherhand, in decoding processing, data is read from the TM and is decoded,and is then written in the VM.

[0045] The audio processing circuit 5, the error correction circuit 9and the encoded-data I/O principally exchange data with the TM.

[0046] Image data (Y, Cr, Cb) before being encoded is written in the VMin units of a pixel. The image data (comprising 720 pixels in thehorizontal direction and 480 pixels in the vertical direction in thecase of the NTSC (National Television System Committee) system) isdivided into 5 blocks in the horizontal direction×10 blocks in thevertical direction, i.e., 50 supermacroblocks (hereinafter termed“SMB's”). Each SMB comprises 27 macroblocks (hereinafter termed “MB's”)each comprising 4 DCT blocks for luminance data and 1 DCT block for eachof two types of color-difference data. Each DCT block comprises 8 pixelsin the horizontal direction×8 pixels in the vertical direction. Theencoding/decoding circuit 7 performs DCT and inverse DCT in units of aDCT block.

[0047] In the present embodiment, in the case of the NTSC system, imagedata for one frame comprising the above-described number of pixels isrecorded on 10 tracks on the magnetic tape after being encoded. At thattime, data for 5 SMB's arranged in the horizontal diretion is recordedon one track.

[0048] The encoded image data, an error correcting code and the like arestored in the TM by being distributed on the above-described 10 tracks,and a plurality of sync blocks (hereinafter termed “SB's”; there are 149SB's in the present embodiment) are stored in a region corresponding toeach track.

[0049] Each SB in image data comprises synchronizing data (hereinaftertermed a “sync”) indicating the head of the SB, ID data (hereinaftertermed an “ID”) indicating each address, the attribute and the like ofthe data, effective data (image data in this case), and a parity code(or simply “parity”) added according to error correcting encoding.

[0050]FIG. 3 is a diagram illustrating data stored in a region for onetrack of the TM.

[0051] In the present embodiment, a sync and an ID are added toeffective video data and an inner code parity, or to an outer codeparity and an inner code parity. The data to which the sync and the IDare added constitutes 1 SB. As described above, 149 SB's constitute datafor one track. 3 blocks (the 1st, 3rd and 138th SB's in FIG. 3) fromamong 149 SB's for one track are used as auxiliary data blocks wheresystem data or data defined by each maker is written.

[0052]FIG. 4 is a diagram illustrating the configuration of theauxiliary data block shown in FIG. 3.

[0053] In FIG. 4, (A) represents 5-byte data comprising a sync and anID, and (B) represents data grouped, for example, in a 5-byte block(hereinafter termed “pack data”). The leading 1-byte data of the packdata constitutes a pack header, and the remaining 4-byte dataconstitutes a data region. 15 blocks of such pack data are presentwithin one auxiliary block, and 45 blocks of such pack data are presentwithin one track. Discrimination between still-image data andmoving-image data is performed according to this pack data.

[0054]FIG. 5 illustrates data recorded in the pack header, and thedefinition of each type of data.

[0055] When recording still-image data on the tape, for example, astill-image leading flag “00h” is written in the pack header of theleading video data where recording of a still image is started,still-image ending flag “02h” is recorded in the pack header of the lastvideo data where the recording of the still image is ended, and astill-image continuing flag “01h” is recorded on the pack header of thevideo data where the recording of the still image is continued.

[0056] By thus writing flags indicating recording of a still image ineach SB, it is possible to identify that still-image data is recordedbetween moving-image data.

[0057] The access of each of the processing circuits to the memory 17 isadjusted and subjected to address control by the address conversioncircuit 13.

[0058] That is, when a command to assign the type of a mode, such as areproducing mode or a recording mode, or information relating to themode directly indicated by a predetermined bit of the address for eachcircuit is transmitted from the CPU's 19 and 23 via the CBS2, theaddress conversion circuit 13 performs scheduling relating to thepriority of data transfer in accordance with the received information,and adjusts data transfer between the concerned processing circuit andthe memory 17 in response to a request of access from the circuit.

[0059] The command is determined by the detection of an operational modeset through the operation switch 37 or the like by the CPU's 19 and 23,and corresponds to an operational mode, for example, an encoding mode, adecoding mode, a special reproducing mode, such as high-speedreproducing, slow reproducing or the like. Operational modes assigned bycommands are not limited to the above-described ones, but also includeediting operations, such as image synthesis, postrecording, insertion,dubbing and the like.

[0060] Next, a description will be provided of access to the memoryduring reproducing processing. FIG. 6 is a diagram illustrating accesstimings to the memory 17 for the respective procesing blocks whenreproducing moving images.

[0061] In FIG. 6, the abscissa represents processing time, and theordinate represents the address of the TM. A region “a” indicated byhatching represents an access by the encoding/decoding circuit 7, abroken line “b” represents an access by the encoded-data I/O 11, andsolid lines “c” represent an access by the error correction circuit 9.

[0062] First, in the period of frame 1, the encoded-data I/O 11sequentially writes reproduced data for 10 tracks from an addresscorresponding to track 0 in bank 0 of the TM in a time periodcorresponding to one frame.

[0063] The error correction circuit 9 sequentially reads data byaccessing the region where the encoded-data I/O 11 has written thereproduced data, by being delayed by the time period of one track({fraction (1/10)} frame period) from the access timing by theencoded-data I/O 11, corrects errors in the reproduced data, andrewrites the corrected data in the same addresses in the memory 17.

[0064] The encoding/decoding circuit 7 first reads data from regionswhere data reproduced from even-numbered tracks are stored from amongdata written in bank 2 not accessed by the encoded-data I/O 11, decodesthe read data, and writes the resultant data in the VM. After completingdecoding processing of all data in the even-numbered tracks, theencoding/decoding circuit 7 reads data from regions where datareproduced from odd-numbered tracks are stored, decodes the read data,and writes the resultant data in the VM.

[0065] Then, in the period of frame 2, the encoded-data I/O accessesbank 1, the encoding/decoding circuit 7 accesses bank 0 where errorcorrection processing has been completed during the period of frame 1,and the same processing as that described above is performed. At thattime, the encoding/decoding circuit 7 writes decoded data in a bankdifferent from the bank of the VM where image data decoded in thepreceding frame has been written (in this case, data stored in bank 2 ofthe TM in the period of frame 1). That is, in a moving-image reproducingmode, writing/reading of image data is alternately performed for eachframe for the two banks of the VM.

[0066] Thereafter, each of the processing circuits performs processingby sequentially changing the bank to access.

[0067] Next, a description will be provided of an operation in astill-image reproducing mode of reproducing only still images whenstill-image data and moving-image data are recorded on the tape in astate of being mixed as shown in FIG. 7. In FIG. 7, moving-image data isrecorded on tracks Tr1, and still-image data is recorded on tracks Tr2.

[0068]FIG. 8 is a diagram illustrating access timings to the memory 17for the respective processing circuits in the still-image reproducingmode. As in FIG. 6, the abscissa represents processing time, and theordinate represents the address of the TM. A region “a” indicated byhatching represents an access by the encoding/decoding circuit 7, abroken line “b” represents an access by the encoded-data I/O 11, andsolid lines “c” represent an access by the error correction circuit 9.

[0069]FIG. 9 is a flowchart illustrating the control operation of therespective CPU's in the still-image reproducing mode.

[0070] When the still-image reproducing mode is assigned through theoperation switch 37, the control CPU 19 controls the mechanism 33 viathe servo CPU 23 to feed the tape 35 at a high speed (step S101). Then,using the above-described still-image flag recorded in the pack headerof the video data, it is determined if a portion where still-image datais recorded is present in the tape 35 (step S102). (This can be doneusing techniques which are well known in the art.) If the result of thedetermination is negative, the process proceeds to step S109, where itis determined if the tape 35 has ended. If the result of thedetermination in step S109 is affirmative, the process proceeds to stepS112, where the end of the tape is displayed on the EVF, and the processis terminated.

[0071] If the result of the determination in step S102 is affirmative,the process proceeds to step S103, where it is determined if a regioncapable of recording image data remains in the TM by performingdetection. If the result of the determination is affirmative, theprocess proceeds to step S104, where still-image data is reproduced fromthe tape 35, and the encoded-data I/O 11 writes still-image data for oneframe in bank 0 of the TM, i.e., the region of bank 0 shown in FIG. 8.

[0072] The operation of detecting a vacant region in the TM in step S103can, for example, be realized in the following manner. That is, thesystem control CPU 19 incorporates 1-bit flags indicating the states ofthe respective banks 0-2 of the TM, and sets the flag to “1” and “0”when reproduced image data for one frame is written in each bank andwhen an instruction to switch the picture frame is provided as will bedescribed later, respectively. It is thereby possible to easilydetermine if an area (bank) where reproduced still-image data can bewritten is present only by checking the states of the flags comprisingthree bits in total.

[0073] As in the case shown in FIG. 6, the encoded-data I/O 11sequentially writed reproduced data for 10 tracks from an addresscorresponding to track 0 in bank 0 of the TM in a time periodcorresponding to one frame.

[0074] The error correction circuit 9 sequentially reads data byaccessing the region where the encoded-data I/O 11 has written thereproduced data, by being delayed by the time period of one track({fraction (1/10)} frame period) from the access timing by theencoded-data I/O 11, corrects errors in the reproduced data, andrewrites the corrected data in the same addresses in the memory 17.

[0075] The processing then awaits an instruction to switch the stillimage to be reproduced (decoded) (step S105). If there is an instructionto switch the still image by the operation of the operation switch 37 bythe user, the bank in the TM from which still-image data is to be readis switched (step S106).

[0076] If there is no instruction to switch the still image, still-imagedata is read from the TM without switching the bank from whichstill-image data is to be read, and the read data is decoded (stepS107).

[0077] It is then determined if there is an instruction to interrupt thereproduction of a still image according to the user's operation of theoperation switch 37 (step S108). If the result of the determination instep S108 is negative, the tape is again fed at a high speed to retrievethe next still-image data.

[0078] If the result of the determination in step S103 is negative,i.e., if still-image data have been written in all of the three banks ofthe TM and there remains no region to record the detected still-imagedata for one frame, the feeding of the tape is stopped at that stage(step S110). The process then proceeds to step S111, where it isdetermined if an instruction to switch the still image to be displayedis present.

[0079] If the result of the determination in step S111 is affirmative,still-image data for one frame is read from the TM and is decoded. Uponwriting of the decoded data in the VM, the next still-image data isreproduced and is written in the bank where the read still-image datafor one frame has been stored.

[0080]FIG. 8 illustrates a case for describing the operation of thepresent embodiment in which three still images are consecutivelyretrieved in frame periods 1-3, an instruction to switch still-imagedata is provided in frame period 3, and an instruction to switchstill-image data is also provided in frame period 5.

[0081] That is, in FIG. 8, in the period of frame 2, theencoding/decoding circuit 7 first reads data written in bank 0 duringthe period of frame 1 from a region where reproduced data fromeven-numbered tracks are stored and decodes the read data. Uponcompletion of decoding processing for all data on the even-numberedtracks, data is read from a region where reproduced data fromodd-numbered tracks is stored, and the read data is decoded.

[0082] Upon detection of the next still-image data in frame period 2,reproduced still-image data is written in bank 1. At that time, however,since no instruction to switch the still image is present, theencoding/decoding circuit 7 also reads still-image data stored in bank 0and decodes the read data in frame period 3.

[0083] Then, if there is an instruction to switch the still image inframe period 3, the bank from which still-image data is to be read isswitched in frame period 4, and the encoding/decoding circuit 7 readsstill-image data from bank 1 and decodes the read data.

[0084] For example, if there is no instruction to switch the still imageeven after frame period 6 after the first still-image data has beenwritten in bank 0, the encoding/decoding circuit 7 repeatedly reads anddecodes still-image data from bank 0, and the servo CPU 23 controls themechanism 33 so as to stop the feeding of the tape until an instructionto switch the still image is present after still-image data has beenwritten in bank 2.

[0085] Actually, a time period corresponding to several tens to severalhundreds of frame periods is required before the next still-image datais detected after detecting one still-image data, the encoding/decodingcircuit 7 repeatedly reads and decodes still-image data from aninstructed bank during this time period.

[0086] As described above, in the present embodiment, since differentstill-image data are written in the three banks of the TM, andstill-image data to be decoded is switched in accordance with switchingof the still image to be displayed, delay time (waiting time) indisplaying processing can be reduced even when retrieving andsequentially displaying only still images.

[0087] Furthermore, since, even when still-image data for three frameshave already been written in the TM, the next still-image data iswritten after switching the still image, it is possible to always storestill-image data for three frames, and to immediately display the nextstill image even when instructions to switch the still image twice areprovided twice before the next still image is detected.

[0088] In the present embodiment, still-image data is repeatedly readfrom the same bank of the TM and is decoded until an instruction toswitch the still image is provided. However, since still-image data inbank 0 is decoded and is stored in the VM during the period of frame 2shown in FIG. 8, decoded still-image data may thereafter be read fromthe VM, and still-image data for the first picture frame after switchingof the still image may be read from the TM.

[0089] A description will now be provided of an access to the memory 17when obtaining a still image by repeatedly reading image data for oneframe from the VM as described above.

[0090]FIG. 10 is a diagram illustrating an access of each circuit to thememory 17 in the present embodiment.

[0091] In FIG. 10, first, still-image data for one frame detected duringthe period of frame 1 is written in bank 0. Then, the ECC circuit 9performs error correction processing for the still-image data stored inbank 0. Then, in the period of frame 2, the encoding/decoding circuit 7reads still-image data in bank 0 in the sequence of an odd-numberedtrack and an even-numbered track in the above-described manner anddecodes the read data, and writes the decoded data in the VM. At thattime, either bank 0 or bank 1 may be used as the bank of the VM wherethe data is written. In the still-image reproducing mode, only one ofthe banks may be used.

[0092] After writing still-image data for one frame in bank 0 in theperiod of frame 1, each CPU retrieves the next still image. During thistime period, still-image data for one frame decoded and written in theVM in the period of frame 2 is repeatedly read by the image-data I/O 3and is displayed on EVF or an external monitor via the data I/O 1.

[0093] When the next still-image data is detected in the period of frame300, the detected still-image data is written in bank 1, and errorcorrection processing is performed.

[0094] After writing the still-image data for one frame in bank 1 in theperiod of frame 300, the next still-image data is retrieved. At thattime, since an instruction to switch the displayed image by the user isnot yet present, still-image data for one frame decoded in the period offrame 2 is read from the VM.

[0095] When the next still-image data is detected in the period of frame700, the detected still-image data for one frame is written in bank 2,and error correction processing is performed. Then, the next still-imagedata is retrieved in the same manner. Now, suppose that the nextstill-image data is detected in the period of frame 900.

[0096] In this case, since data in bank 0 has already been decoded inthe period of frame 2, still-image data for one frame is again writtenin bank 0 in the period of frame 900, error correction processing isperformed, and the next still image is retrieved.

[0097] When the next still-image data is detected before an instructionto switch the display picture frame is provided (between the period offrames 901-1000 in the case of FIG. 10) after writing still-image datafor one frame in the period of frame 900, since three still image datahave already been written in the three banks of the TM, the feeding ofthe tape is stopped at that position.

[0098] When there is an instruction to switch the display picture framein the period of frame 1000, the encoding/decoding circuit 7 readsstill-image data for one frame from bank 1, decodes the read data, andwrites the decoded data in the VM.

[0099] When the still-image data in bank 1 is decoded in the period offrame 1000, the tape is again fed, and still-image data for one framealready detected before the period of frame 1000 is written in bank 1 inthe period of frame 1001, and error correction processing is performed.

[0100] As described above, in the case shown in FIG. 10, since decodingprocessing is performed only once for image data of each bank when astill image is displayed, and then still-image data for one frame isrepeatedly read from the VM, it is unnecessary to operate theencoding/decoding circuit 7 while data is read from the VM.

[0101] In the present embodiment, since the above-described TM and VMare disposed in the same memory 17, it is possible to change thecapacities of the TM and the VM when moving images are reproduced andwhen still images are reproduced, and to improve the operability of theapparatus.

[0102]FIG. 11 is a diagram illustrating the configuration of addressesin the memory 17 when reproducing moving images.

[0103] Addresses are allocated to bank 0 of the VM, bank 1 of the VM,bank 0 of the TM, bank 1 of the TM, and bank 2 of the TM in the sequencefrom lower addresses.

[0104] Consider a case of switching from the moving-image reproducingmode to the still-image reproducing mode. In the moving-imagereproducing mode, it is necessary to reproduce image data by alternatelyusing bank 0 and bank 1 of the VM. However, as described above, in thestill-image reproducing mode, decoded image data for the same frame maybe repeatedly output from the VM. Hence, one of the two banks of the VMbecomes unnecessary.

[0105] Accordingly, by allocating the one unnecessary bank of the VM asthe TM, the number of banks of the TM can be increased when displayingonly still images by retrieving still-image data in the above-describedmanner.

[0106] This operation will now be described with reference to FIG. 12.

[0107] The control CPU 19 prohibits writing of decoded image data in oneof the banks of the VM (bank 0 in the present case) in response toswitching from the moving-image reproducing mode to the still-imagereproducing mode by the operation of the operation switch 37, andrepeatedly reads decoded image data from bank 0, and at the same timeshifts to an operation of retrieving still-image data in theabove-described manner.

[0108] In the address configuration of the memory 17, the number ofbanks of the VM is decremented by one, and the number of banks of the TMis incremented by three. More specifically, in the moving-imagereproducing mode, addresses in bank 1 of the address configuration shownin FIG. 11 are allocated as addresses in bank 3-bank 5 of the TM asshown in FIG. 12.

[0109] By thus allocating unnecessary banks of the VM to the TM in thestill-image reproducing mode, it is possible to write more still-imagedata in the TM, and to shorten waiting time until display even whenstill images are sequentially switched and displayed.

[0110] Although in the present embodiment, capacities of two frames andthree frames are provided for the VM and for the TM, respectively, thepresent invention is not limited to such capacity values. That is, theTM may have at least two banks, and the VM may have any number of banks.Particularly, as the number of banks of the VM increases, theoperability can be further improved.

[0111] That is, in the still-image reproducing mode, a capacity for onlyone frame may remain for the VM, and all of remaining portions of the VMcan be used as the TM.

[0112] In the present embodiment, the present invention is applied to astill-image reproducing mode of reproducing only still images in adigital VCR. However, the present invention may also be applied to acase of reproducing or processing only data of a predetermined formatfrom among data of a plurality of formats, and the same effects can alsobe obtained.

[0113] As is apparent from the foregoing description, even whensequentially reproducing still images by storing still-image data for aplurality of picture frames in storage means and selectively reading thestored data, waiting time until a still image is reproduced can beshortened.

[0114] According to the present embodiment, by changing the storageregion between the moving-image reproducing mode and the still-imagereproducing mode, it is possible to store a larger amount of encodedimage data, for example, by expanding the storage region for encodeddata in the still-image reproducing mode, and to shorten waiting timeuntil a still image is reproduced even when sequentially reproducingstill images.

[0115] Furthermore, since the storage region for data having apredetermined format is changed in accordance with the mode, it ispossible to provide an optimum environment for the use of a memory inaccordance with the mode and the format of data to be processed.

[0116] That is, for example, by reducing the storage region for data ofan unnecessary format in a particular mode, it is possible to expand thestorage region for data of a necessary format.

[0117] The individual components designated by blocks in the drawingsare all well-known in the image-data reproducing apparatus arts andtheir specific construction and operation are not critical to theoperation or the best mode for carrying out the invention.

[0118] While the present invention has been described with respect towhat is presently considered to be the preferred embodiment, it is to beunderstood that the invention is not limited to the disclosedembodiment. To the contrary, the present invention is intended to covervarious modifications and equivalent arrangements included within thespirit and scope of the appended claims. The scope of the followingclaims is to be accorded the broadest interpretation so as to encompassall such modifications and equivalent structures and functions.

What is claimed is:
 1. A reproducing apparatus, comprising: reproducingmeans for reproducing image data from a recording medium wheremoving-image data and still-image data are recorded; storage means forstoring still-image data for a plurality of different picture framesreproduced by said reproducing means; and memory control means forselectively reading the still-image data for the plurality of pictureframes stored in said storage means.
 2. An apparatus according to claim1, wherein the image data comprises encoded image data, and furthercomprising decoding means for decoding the still-image data read fromsaid storage means, wherein said storage means also stores thestill-image data decoded by said decoding means.
 3. An apparatusaccording to claim 2, wherein said storage means stores the encodedimage data and the image data decoded by said decoding means indifferent areas.
 4. An apparatus according to claim 1, furthercomprising: detection means for detecting the still-image data fromamong the image data reproduced by said reproducing means; feeding meansfor feeding the recording medium; and feeding control means forcontrolling a feeding operation of said feeding means in accordance witha result of detection by said detection means.
 5. An apparatus accordingto claim 1, further comprising: manual operation means, wherein saidmemory control means reads still-image data stored in said storage meansin accordance with an operation of said manual operation means.
 6. Areproducing apparatus comprising: reproducing means for reproducingimage data of a first format from a recording medium; first storagemeans for storing the image data of the first format reproduced by saidreproducing means; processing means for obtaining image data of a secondformat by performing processing for the image data of the first formatstored in said first storage means; second storage means; and modesetting means for setting a mode of said apparatus from among aplurality of modes, the plurality of modes comprising (1) an ordinarymode, in which said first storage means stores the image data of thefirst format reproduced by said reproducing means, and said secondstorage means stores the image data of the second format obtained bysaid processing means, and (2) a special mode, in which said firststorage means and said second storage means store the image data of thefirst format reproduced by said reproducing means.
 7. An apparatusaccording to claim 6, wherein the image data of the first formatcomprises encoded image data, and wherein said processing meanscomprises decoding means for decoding the encoded image data.
 8. Anapparatus according to claim 7, wherein the image data of the secondformat comprises image data decoded by said decoding means.
 9. Anapparatus according to claim 6, wherein said reproducing meansreproduces image data from the recording medium where moving-image dataand still-image data are recorded.
 10. An apparatus according to claim9, wherein said reproducing means reproduces the moving-image data inthe ordinary mode, and reproduces the still-image data in the specialmode.
 11. An apparatus according to claim 6, wherein said first storagemeans and said second storage means are configured as a single memorycircuit.
 12. A reproducing apparatus, comprising: reproducing means forreproducing image data from a recording medium where moving-image dataand still-image data are recorded; storage means for storing the imagedata reproduced by said reproducing means; and mode setting means forsetting a mode of said apparatus from among a plurality of modes, theplurality of modes comprising (1) a moving-image reproducing mode, inwhich said reproducing means reproduces the moving-image data and saidstorage means stores the moving-image data for n (n being an integerequal to or greater than 2) picture frames, and (2) a still-imagereproducing mode, in which said reproducing means reproduces thestill-image data, and said storage means stores the still-image data form (m>n) picture frames.
 13. An apparatus according to claim 12, whereinthe image data comprises encoded image data, and further comprisingdecoding means for decoding the still-image data read from said storagemeans, wherein said storage means also stores the still-image datadecoded by said decoding means.
 14. An apparatus according to claim 13,wherein said storage means also stores the decoded image data for “a”(“a” being an integer equal to or greater than 1) picture frames in thestill-image reproducing mode, and stores the decoded image data for b(b>a) picture frames in the moving-image reproducing mode.
 15. A dataprocessing apparatus, comprising: storage means for storing first imagedata of a first format, and second image data of a second formatdifferent from the first format; and control means for changing astorage area for the first image data in said storage unit in accordancewith an operating mode in which said apparatus is instructed to operate.16. An apparatus according to claim 15, wherein said storage meansstores the first image data in a first area, and the second image datain a second area different from the first area.
 17. An apparatusaccording to claim 16, wherein said control means changes a size of thefirst area in accordance with the mode.
 18. An apparatus according toclaim 15, wherein the first image data comprises encoded image data, andfurther comprising decoding means for decoding the first image datastored in said storage means, wherein the second image data comprisesthe image data decoded by said decoding means.
 19. A reproducingapparatus, comprising: reproducing means for reproducing encoded imagedata from a storage medium where moving-image data and still-image dataare recorded; storage means for storing the encoded image datareproduced by said reproducing means; decoding means for decoding theencoded image data stored in said storage means, said storage means alsostoring the decoded image data; and control means for changing a storagearea for the encoded image data in said storage means in accordance withan operating mode in which said apparatus is instructed to operate. 20.An apparatus according to claim 19, wherein the mode is one of a groupcomprising (1) a moving-image reproducing mode, in which saidreproducing means reproduces the moving-image data from the recordingmedium, and (2) a still-image reproducing mode, in which saidreproducing means reproduces the still-image data from the recordingmedium.
 21. An apparatus according to claim 20, wherein said controlmeans controls said storage means so as to store the encoded image dataand the decoded image data in a first area and in a second area,respectively, in the moving-image reproducing mode, and to store theencoded image data in the first and second areas in the still-imagereproducing mode.
 22. An apparatus for reproducing encoded image datafrom a recording medium where still-image data for a plurality ofdifferent picture frames are recorded together with moving-image data,and for storing the reproduced encoded image data in a memory, saidapparatus having a still-image reproducing mode of automaticallydetecting and reproducing the still-image data for the plurality ofpicture frames recorded on the recording medium by controlling anoperation of feeding the recording medium, and storing the reproducedstill-image data for the plurality of picture frames in the memory.